In the spirit of simplification over optimization I think we should change the default serialization behaviour of variable-length arrays and then introduce an advanced option to reenable the existing bandwidth-optimized behaviour:
would silently expand to:
void3 uint8[<=16] a
Optionally the system designer could do
@unaligned uint8[<=16] a
to reenable the behaviour defined in v1 alpha and v0.
The current behaviour is unintuitive and requires a thorough reading of the specification by the system designer. Even then the system designer has to manually perform and remember to maintain the
ceil(log2(capacity+1)) calculation needed to install the proper void padding. The implicit behaviour would always waste bits to keep the first element of the array aligned.
uint2 a uint8[<=16] b
So what about this? One possibility is that the DSDL compiler knows to imply this:
uint2 a void1 uint8[<=16] b
The other is that we assume unaligned is expected if the variable length array is started on an unaligned boundary implying this:
uint2 a @unaligned uint8[<=16] b
I breif survey might be in order to determine which of these two behaviours are “intuitive”.